ザイリンクス AXI DMA IP コアをブロック デザイン (Vivado IP インテグレーター、Zynq) に追加すると、Vivado で生成されたハードウェア仕様がザイリンクス SDK で処理できなくなります。
AXI DMA の構成は単純で、読み取りチャネルのみで、スキャッター/ギャザーはありません。
Vivado 2014.1 / ザイリンクス SDK 2014.1
ERROR : [Common 17-55] 'get_property' expects at least one object.
ERROR: [Hsm 55-1545] Problem running tcl command ::sw_petalinux_v2_00_b::generate : ERROR: [Common 17-55] 'get_property' expects at least one object.
while executing
"get_property NAME $axidma_ip_handle"
("axi_dma" arm line 8)
invoked from within
"switch -exact $type {
"axi_intc" {
# Interrupt controllers
lappend node [gen_intc $slave $intc "interrupt-controller" "C_NUM_INTR_INPUTS C_KIN..."
(procedure "gener_slave" line 37)
invoked from within
"gener_slave $bus_node $ip $intc_handle "" $busif_handle"
("foreach" body line 17)
invoked from within
"foreach ip $sorted_ip {
# make sure the sorted_ip list does not content force ip list
# otherwise, same duplication of dts node will appeare..."
(procedure "bus_bridge" line 153)
invoked from within
"bus_bridge $hwproc_handle $intc 0 "M_AXI_DP" "" $ips "ps7_pl310 ps7_xadc""
(procedure "generate_device_tree" line 93)
invoked from within
"generate_device_tree "xilinx.dts" $bootargs $consoleip"
(procedure "device-tree_v1_01_b::generate" line 53)
invoked from within
"${bsp}::generate $os_handle"
(procedure "namespace_generate" line 6)
invoked from within
"namespace_generate $bsp $bsp $path $os_handle"
("foreach" body line 3)
invoked from within
"foreach bsp ${bsps} {
create_namespace $path $bsp $os_handle
namespace_generate $bsp $bsp $path $os_handle
}"
(procedure "::sw_petalinux_v2_00_b::generate" line 16)
invoked from within
"::sw_petalinux_v2_00_b::generate petalinux"
ERROR: [Hsm 55-1442] Error(s) while running TCL procedure generate()
ERROR : Error generating bsp sources: Failed to generate BSP.
しかし、AXI DMA がなければ、ARM+FPGA プロジェクトはうまく機能します。